Sunday, November 16, 2014

Towards a Definition of a Digital Clock Signal Generator in an Application of Solid State Circuit Elements

Being a student of an online college -- lately, taking some small liberty toward extending one's studies beyond the institutional environment of the same, albeit at the expense of my GPA presently going into the bucket, in so much of a momentary opportunity cost analysis -- I've been studying not so much of what the course presents, with regards to each week's topics. Last week, we discussed at least two types of transistor, namely BJTs and FETs, focusing on JFETs n the latter regards.

This week, we've discussed at least two applications of an op-amp, namely in the inverting and non-inverting applications of an op-amp -- differentiating those, essentially, as to which input terminal of an op-amp would receive the current from the feedback loop routed to the output terminal of the op-amp.

In a previous article here at my DSP42 web log, I'd provided a short outline with regards to many different applications of op-amps. It  is a short outline, albeit, none particularly detailed with regards to applications.

For a short time, this week, personally I was concerned as with regards to whether an op-amp may illustrate any nondeterministic behaviors, between inputs, outputs, and feedback in the op-amp circuit. In an analysis a design of the original 741 op amp -- as documented at Wikipedia, referencing the previous article -- certainly, such an op-amp is composed all of solid-state electronic circuit elements -- albeit, in a large network of transistors, but perhaps mostly all of common emitter amplifiers. So, perhaps it may be possible to define a deterministic model of any behaviors of an op-amp, with any number of discrete, known inputs -- albeit, with a certain depth of repetitive calculations. In that regard, I kindly suggest applying Common Lisp.

Today -- after a short study of Maker Media's Encyclopedia of Electronic Components, Vol 2 (LEDs, LCDs, Audio, Thyristors, Digital Logic, and Amplification) -- in completing the day's discussion response at the college I'm presently enrolled in, as proceeding essentially from a task for denoting a non-inverting application of an op-amp, I'd begun an outline for a design of a hypothetical digital clock circuit -- nothing new to the whole world, certainly, though it is "New to me"

Sure, it's nothing detailed -- accompanied with not a single formula for a mathematical design of such a thing, assuming such a circuit design would be possible -- but if one must design a non-crystal oscillator, perhaps here's a start to the same, as extending literally of the Encyclopedia of Electronic Components, Vol 2. My comment follows:

An op-amp in a sort of a non-inverting circuit  -- as namely, with the feedback resistor and R1 routed to the non-inverting terminal of the op-amp  -- such a circuit can be applied with a capacitor effectively between the inverting and non-inverting input terminals of the op amp, and an additional feedback resistance together with the VDC to the inverting input terminal, in designing a simple relaxation oscillator. 
Such an oscillator would produce a repetitive signal of a known amplitude, from a DC voltage source, as an effect of the periodic voltage differential at the capacitor creating a periodic voltage differential to the input terminals of the op-amp, throughout the capacitor's charge cycle.

In designing such an oscillator, the resistance of the feedback resistor and R1 may be selected such as to control the effective impedance at the op-amp. Perhaps that may have an effect towards determining the exact amplitude of the output signal, in addition to the effect of the power supply provided to the op-amp's power supply terminals.

The rating of the capacitor would be selected as towards determining the frequency of the output signal in the oscillator design.

In such a circuit, the "feedback loop" at the op-amp is presented to the non-inverting input terminal. Perhaps, the design could be refactored such that the input terminals of the op-amp would be effectively "swapped" -- towards applying the op-amp as an inverting op-amp, then -- as to an effect of a similar circuit, in which the output signal would have a different timing, with relation to the activation of the source voltage, in the circuit.

Perhaps, this might seem to lend a discussion towards an application of an op-amp within a digital system. The output of the relaxation oscillator, perhaps, could be electronically finessed such as to produce an effective square wave of a constant pulse width, from the output of the initial relaxation oscillator -- as towards a design for a digital clock circuit. In such a design, certainly the amplitude of the clock circuit should be designed such that final square wave output of the clock circuit would operate at both peak and, under load, at minimum voltages appropriate to the transistor technology -- whether TTL, CMOS, or otherwise -- as would be applied in the later elements of the circuit.

Certainly, any number of semicondustor manufactures would provide digital clock signal generators, prefabricated for application to exact specifications in digital systems. if one might wish to design a computer "from scratch," though, or any single digital circuit element for application, certainly it would call for an application of electrical science -- certainly, with some sort of a digital clock signal, in application.

Works Consulted

[1] Platt, Charles Encyclopedia of Electronic Components, Vol 2. Maker Media. 2014. Kindle edition. Kindle Location 1612 / fig 7-13
[2] Relaxation OscillatorHyperphysics
[3] CADR. MIT AI Lab. Circa late 1970's / early 1980s. Schematic.