Towards a TWI+PCI Implementation of IBM's Token Ring Network Architecture

The following is a verbatim copy of a response I'd written for a private discussion forum at an online university, this day. The discussion, essentially, was towards a comparison and contrast of a number of network technologies applied at "Layer 0" of the OSI seven layer model. My response, in this item, focuses specifically about token passing, as used in each of FDDI networking and in token ring networking, among all available digital systems interconnects. 

The topic of token ring networking has particularly caught my attention as a developer, considering the possibility of refactoring the technology for application onto I2C interconnets, for application ostensibly within a parallel computing model incorporating CORBA. In my response, after the items about token passing in token ring networking, I've begun "taking some notes," towards such an ostensible redesign of token ring networking for a parallel computing model onto I2C and PCI interconnects.


Token access, or token passing is a network flow control technique used in token-ring networks. The technologies for token ring networking were originally developed by IBM, in the 1970's , and may still be applicable in some network environments -- for instance, where network fault tolerance is a high priority, such as in networked industrial automation and measurement environments.

A token ring network utilizes a star topology, in which a multistation access unit (MAU) provides ports for eight individual hosts, additionally one port for a ring in cable and one port for a ring out cable. Effectively, the MAUs are connected in a ring, with individual hosts each connected to a single MAU. Infoar as it being a "star" network topology, geometrically it's not exactly like the conventional multi-connected, five-pointed star, might seem perhaps more like a ring with "leaf" nodes.

On a token ring network, after the network is initialized and an active monitor station determined on the network,  an electronic token is sent onto the network and transferred from station to station, until arriving at a station that has data to send on the network. 

At the sending station, a single bit in the token frame is changed before retransmit, thus transforming the token frame into a start-of-frame sequence for an information frame. Information is then appended to the start-of-frame sequence, that information necessarily including an address of a specific format (byte?) identifying the intended receiving station for the token. 

The information frame is then transmitted onto the network, and successively retransmitted -- whether along the MAUs only? or entirely from host to host --  until arriving at the intended receiving station. The receiving station then copies the information frame, sets two bits in the information frame to indicate that it has received the information, and will retransmit the information frame. The information frame then continues around the network until arriving at the original sending station. 

Due to the application of the token passing technique, data collision is effectively not a concern on a token ring network


Network token passing is also used in FDDI networking

Works referenced:
[1]  Cisco DocWiki Token Ring/IEEE 802.5 [2] CTDP  Token RIng.  The CTDP Network Certification Reference Version 0.6.2 

On a sidebar, with regards to developing a concept for an academic thesis ostensibly with regards to parallel computing: Token ring networking could be considered for a design of an I2C network. I2C is a "Wire protocol" available via interfaces in some single-board computing platforms and the Arduino microcontroller platform. In that regards, I would propose some notes, which I will presently try to extend on, in draft editions of this comment

• An I2C implementation of a token ring methodology would not necessarily require an application of an MAU, per se.
• I've not studied up about a lot of the details of I2C and the corresponding TWI protocol, however I've read that each utilizes some sort an addressing format, and a sort of centralized, single "master" design, fundamentally, in which one I2C device is a single "master" device, and would indicate via synchronization with clock signals, the address of an intended "receiving" device, before sending data to that receiving device. All devices on the I2C network would be, effectively, "Listening" at all times, no the I2C network, to detect when the "master" device indicates that a datum is to be sent on the network, and to indicate the peer address of the device to which the datum is to be sent, then to indicate the end of the transmission to that device. (Of course, I should wish to review an exacting, authoritative reference about I2C and/or TWI, at that. I've been of a presumption that it would allow for a "Multi-master' protocol to be defined -- focusing on TWI -- however, I'm not certain of how that might be approached in the exact "Wire protocol.") 
• The ostensible I2C token ring implementation could be designed such that it would be a "Signle mastering" protocol, in which the single "master' device would be the active monitor station of the I2C Token Ring 
• Each device on the I2C token ring network would need exactly two I2C interfaces, such that one would be the device's on I2C or rather, "TWI ring in" and the other, the "TWI ring out"
• Termination of a TWI ring network : If it was implemented in a pre-designed hardware configuration, the hardware could be designed such that it would define a "Built in ring". I need to study more about I2C or TWI, to specify how that could be approached, in a high-level view of the wiring. 
• Extensibility of a TWI ring network: The Monitor/Master device could be defined effectively as to provide exactly two ring network interfaces -- one for an "on board' ring, and one for an "on PCI bus" ring, if the hardware of the device network was implemented with a PCI interface on a single PCB. Then, each PCB should need to be identified with a "board number," as well as each I2C device on the PCB being identified with a "Device number", thus creating effectively a two-part addressing protocol for messages across the entire TWI "ring" including devices on other PCBs
• Termination of a ring network as designed onto TWI + PCI interfaces: On the PCI interface, the network could be designed more like an IBM token ring network, insofar as that a single "active monitor" would identify itself, and the other PCBs on the network would be designed as to acknowledge the designation of the "active monitor". 
• Once the networking and addressing protocols would be specified, then it could be possible to develop a peer-to-peer or client-server application on the network, e.g using the existing work of the CORBA specifications, specifically focusing on GIOP ostensibly for extension onto any single static-model TWI/PCI Token Ring Network, ostensibly for developing a parallel computing model such as could be implemented within a single PC architecture, using conventional PC peripheral interfaces including PCI.
• It might seem unorthodox, in some ways -- if not altogether unoriginal -- if simply for it being an extension of existing electronics protocols. Of course, if it could be towards the development of a useful parallel computing model, then certainly one would wish to inquire as to what parallel computing could be used for, in real-world applications within contemporary enterprise. Personally, I'm more concerned about the hardware design, at this time. I think it could be useful in an artificial neural network design, but I've not read a lot about that, and neither about statistical computing.