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*viz a viz*:

**. In the original article that I had seen mentioned about the news, at the Twitter social microblog service --**

*A new electronic component to replace flash storage**viz a viz*,

*Swiss researchers have created a memristor with three stable resistive states*(newelectronics) -- the research is attributed to researchers at ETH Zürich. In some regards, juxtaposed to ETH's web site, the article published at the SNF's web site might seem overall more informative about the scientific development of the discovery. A short search for "memsistor" at the ETH web site does not reveal any search results.

In both articles -- the first, published at the SNF web site, and the second, published at the newelectronics web site (UK) -- in both articles, the discovery is referenced as in a context of reprogrammable memory-oriented storage.

Of course, it would be a short semantic leap from such a topic, to a topic of solid state device (SSD) storage modules -- as, in applications, SSD modules serving as certainly a common feature of mobile computing appliances, of contemporary "Rack mount" server architectures, and sometimes also in laptop computing architectures. The repercussions of a new three-state method for data encoding within reprogrammable memory-oriented storage, it could be profound simply in the storage manufacturing industry.

What struck me about the article: The discovery essentially describes a three-state mode of logical voltage analysis -- principally, as a matter distinct to the contemporary "Tri-state" voltage analysis, that as with regards to "voltage high", and "voltage low" states, and a mysterious "high-impedance" state of a discrete electrical circuit, in a design-oriented view -- that rather, the discovery introduces a mode of logic in which a whole new unit of measure of information is required, the "Trit", a three-state

*bit-like*unit of measure for information.

Considering -- albeit, in a manner of broadly foreshortened synopsis -- considering the broad range of conventions developed, to the contemporary "State of the Art", developed as with regards to discrete

*binary*states of logic, in a manner of a

*binary*voltage-state model of discrete circuit analysis, the "Trit" -- in its applications -- along with the corresponding

*memsistor*technology developed -- it would seem, jointly developed -- by ETH Zürich and the Swedish National Science Foundation, these could substantially affect the very nature of electrical circuit design, as primarily of circuits implementing a conventional

*binary voltage-state model*in circuit design.

It might seem like onl;y a small item of news, a mere quantum of popular press in a very large information space of the contemporary Webs. It is, potentially, a discovery of momentous significance -- significant not only in with regards to prospective designs of computer hardware, but furthermore significant as in regards to the essential nature of logical/mathematical models applied in circuit analysis and circuit design.

The author of this web log article being, perhaps, something of a "Rogue scholar," maybe it could seem convenient therefore that the author is in any ways of a disposition to be able to observe the significance of the discovery. Not as if to attribute it to any manner of any manner of a national stack of industrial laurels, however. The discovery is profound.

Focusing about some topics as commonly referenced with regards to mathematics developed of the contemporary electrical sciences, to the contemporary "State of the art" in electronics -- voltage, current, resistivity, "and so on" -- considering that any new development of the "State of the Art" must necessarily proceed from a number of previous developments in the "State of the Art", it may be possible to develop at least an estimation of how a "Trinary logic" could be applied in circuit design. The author of this article -- perhaps, stretching a little far, semantically -- the author of this article estimates that it could serve to introduce a manner of a spherical model of mathematical analysis of electrical circuits.

Short of delving into a very visual illustration: Conventional electromagnetic waverforms can be rendered -- as in a voltage analysis -- rendered for a time-series presentation on a Euclidean space of coordinate (t,E) for t representing time, E representing voltage, and the Euclidean coordinate space being presented in as a rectangular coordinate plane. In an alternate model for voltage analysis over time, E can be rendered as a polar radius, t as a polar azimuth, and the continuous voltage waveform illustrated -- whether instantaneoiusly, or in in a computationally interactive manner -- illustrated as in a projection onto a polar coordinate plane.

Albeit -- the author sifting through his own thesis, presently -- the discovery at ETH/SNF does not itself introduce any new measure of fundamental electrical information. It does not any add new -- so to speak -- any new greek letters to the formula of Ohm''s Law. Thus, it might not seem sufficient to introduce so much as an "iota" of a

*third vector element*-- pun intended -- to the (r, theta), or (E, t) analysis of voltage over time. Thus, perhaps it may not be immediately representative of any new manner of spherical model of anything,

*per se*. Simply, the guesstimate -- so to speak -- as towards a

*spherical space*for analysis of electrical systems, it might derive only of the author's own small effort for estimating a "plane" for a "third state", in a

*trinary voltage*model -- assuming there is a plane on which a

*binary voltage waveform*may be rendered -- which there is, as to a presentation in terms of

*voltage*and

*time,*not so much immediately in terms of the conventional

*binary logical voltage*model, such that is extended -- as in an orthogonal, if not transitive manner -- such a binary model originally being extended to a concept of

*binary voltage analysis*, principally extended to a concept of an

*information content*in and of

*voltage states*, in a direct current (DC) circuit.

The discovery of an application for a

*trinary logic*in a "real world" electrical system -- as towards an estimate of potential applications, simply -- it may most certainly entail a consideration of what a voltage state "Means," in a circuit.

Beyond the perhaps simple analysis of a polar state of voltage -- as with regards to theoretical "Electron surplus" and "Electron deficit" states, in a charge-oriented/kinetic theory of circuits -- albeit, the polarity of a charge source, as may be a property of and in a continuous, alternating current flow, it might not seem to be immediately "Factored in" to a discrete logical model of circuits. In a shorter phrasing: Polarity may not typically occur as a concern, in digital circuit design. Logical circuits typically operate on direct current -- ideally, as with no reversal of

*current polarity*occurring, in a logical circuit.

Considering the "high/"low" or "on/off" state of a discrete signal in a DC circuit as it being a single, discrete

*state*or

*quality*representative of the DC voltage of the discrete signal -- as onto any single voltage-level model, whether of industiral conventions in Transistor Transistor Logic (TTL), or conventional CMOS logic, or in any of the newer low-power logics typically found in applications of mobile appliances -- perhaps it could seem to greatly complicate the manufacturers' responsibilities for circuit design, if as to introduce a trinary

*voltage state*model.

**That it could -- in ways -- that it could positively affect the overall "Information bandwidth" of circuits**, perhaps that might be sufficient as to retain the manufacturers' attention to the topic.

If a unit of information may be measured as in a

*base three*or

*trinary*model of voltage states (E_0,E_1,E_2), the third logical state of the

*trinary model*would not immediately "fit in" with either of the TTL or CMOS voltage state models. E_2 would need to be defined with an "acceptable voltage range" , as much as E_0 and E_1 are presently defined of to an "Acceptable voltage range" in the present TTL and CMOS models.

This is all diverging, although, from the author's own novel project idea of making "A thing" out of the geometry model in the Common Lisp Interface Manager (CLIM), seconded with an applciation of the Garnet KR subsystem for a design of an algebraic system ... and supported with a project the author of this article now denotes as the "Open Book" project, manageably a project developed under the Hardpan Tech label. The project has existed for only a half of a day, and it is already at full momentum ....

Perhaps, more "Updates" will "Follow," soon.

In albeit a simple sense, the discovery may introduce a new manner of meaning about analysis and design of information-carrying circuits -- such that could be, as a category of circuits, juxtaposed to so many mechanical work-producing circuits as may be applied in in electrical mechatronic systems, as well as photo-electrical circuits, such that may be applied in any typically non-central manner, in solar-electrical generator systems.

The author will resume an imitation of a decorative potted plant, presently.

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